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A comment on AMD Zen 3/Ryzen 5000 announcement [video]. Parent comment

Re:AMD Zen 3/Ryzen 5000 announcement [video] by dragontamer on Thursday October 08, 2020 @12:54PM (#24721050)
But this is an architectural tweak on the same node. Zen2 was 7nm TSMC, while Zen3 is 7+nm TSMC.

TSMC must have optimized the heck out of their transistors to deliver such a large benefit. Or the AMD Zen 3 architecture really found some low-hanging fruit or something to grossly improve performance.

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Re:AMD Zen 3/Ryzen 5000 announcement [video] by pedrocr on Thursday October 08, 2020 @01:32PM (#24721533)
The IPC increase seems to be coming from the microarchitecture, not the process. The Anandtech article includes a breakdown:

https://images.anandtech.com/doci/16148/1%20Slide%206_575px....

    +2.7% Cache Prefetching
    +3.3% Execution Engine
    +1.3% Branch Predictor
    +2.7% Micro-op Cache
    +4.6% Front End
    +4.6% Load/Store
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Re:AMD Zen 3/Ryzen 5000 announcement [video] by phkahler on Thursday October 08, 2020 @05:32PM (#24724150)
No silver bullet there, just small gains in a bunch of areas. Some of those may have been hard wins too.
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Re:AMD Zen 3/Ryzen 5000 announcement [video] by bch on Thursday October 08, 2020 @01:07PM (#24721245)
> low-hanging fruit or something to grossly improve performance.

If there’s such a thing anymore I’d be fascinated to hear about it.

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Re:AMD Zen 3/Ryzen 5000 announcement [video] by pedrocr on Thursday October 08, 2020 @01:37PM (#24721584)
Anandtech will have one of their detailed microarchitecture breakdowns at product availability day (November 5th).
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Re:AMD Zen 3/Ryzen 5000 announcement [video] by moonbas3 on Thursday October 08, 2020 @03:11PM (#24722648)
In the slides it was still marked as 7nm without the +.
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