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Re:AMD PSB Vendor Locks EPYC CPUs for Enhanced Security at a... by shawnz on Tuesday September 08, 2020 @10:58PM (#24416491)
Why couldn't they have put the key in user-resettable memory which erases the disk encryption key when cleared, like with TPMs for example? It was a poor design to even allow it to be used this way.
Re:AMD PSB Vendor Locks EPYC CPUs for Enhanced Security at a... by sterlind on Wednesday September 09, 2020 @01:22AM (#24417438)
Booting from disk is the BIOS's job. The whole point is to guard against a compromised motherboard.
Re:AMD PSB Vendor Locks EPYC CPUs for Enhanced Security at a... by shawnz on Wednesday September 09, 2020 @08:05AM (#24420084)
If the CPU prevents the disk from ever being unlocked, there's nothing to compromise by controlling the motherboard
Re:AMD PSB Vendor Locks EPYC CPUs for Enhanced Security at a... by clinta on Wednesday September 09, 2020 @08:17AM (#24420176)
This method prevents the user from trying to recover with a backed up encryption key, or booting live media. Instead it makes it clear that this motherboard is compromised and cannot be safely used.
Re:AMD PSB Vendor Locks EPYC CPUs for Enhanced Security at a... by shawnz on Wednesday September 09, 2020 @08:41AM (#24420341)
And in the current model, what prevents the user from assuming the processor is dead and replacing it with an unlocked one (which will then presumably become permanently locked to the compromised motherboard)?

If you care about this specific attack scenario then make sure you check the keys with a management tool or something. It's not necessary to make the chip unusable for almost every aftermarket user just to make it a little bit clearer that a compromise has happened in that rare case.

Re:AMD PSB Vendor Locks EPYC CPUs for Enhanced Security at a... by clinta on Wednesday September 09, 2020 @10:52AM (#24421651)
Fair point. Though in many large environments the number of people with access to the IPMI console is greater than the number of people with physical access who can swap out a CPU.

I'm just trying to speculate what might be driving demand for this type of feature, since TPMs already exist.