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A comment on Surprising new feature in AMD Ryzen 3000. Parent comment

Re:Surprising new feature in AMD Ryzen 3000 by pja on Friday August 28, 2020 @08:38AM (#24304114)
I think the point is that most ordinary C-code should already conform to this access pattern. The side comment about aliasing is a great big hint in that direction.

(This article is grist to the mill of my "every CPU eventually evolves to become an interpreter for its dominant programming language" thesis.)

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Re:Surprising new feature in AMD Ryzen 3000 by bryanlarsen on Friday August 28, 2020 @09:14AM (#24304422)
Yes, AMD probably added the optimization because it was a common pattern emitted by compilers.
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Re:Surprising new feature in AMD Ryzen 3000 by convFixb on Friday August 28, 2020 @08:51AM (#24304230)
I wonder if this causes a performance penalty on position independent code, which seems to be used a lot on non-Windows platforms [].

[] It always struck me as one of those propeller-head features that GCC & co. love but which the MS and Intel compilers avoid 'just to be on the safe side' :]

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Re:Surprising new feature in AMD Ryzen 3000 by zbjornson on Friday August 28, 2020 @11:10AM (#24305784)
He mentions this doesn't work with RIP-relative addressing, but I don't see how it would cause a penalty otherwise.
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Re:Surprising new feature in AMD Ryzen 3000 by qppo on Friday August 28, 2020 @09:03AM (#24304334)
re your thesis, can't wait for a WASM ISA on a commercial CPU and canvas instructions for its graphics coprocessor
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Re:Surprising new feature in AMD Ryzen 3000 by PaulDavisThe1st on Friday August 28, 2020 @11:47AM (#24306260)
you'll need to wait for WASM to become "the dominant language" on a commercial CPU. definitely not next year.
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