Re:Intel Plunges as It Weighs Exit from Manufacturing Chips
by exmadscientist on Sunday July 26, 2020 @08:14PM
(#23961169)
TSMC's original 7nm process 7FF did not use EUV. They did introduce EUV for certain layers in N7+, their "second generation" 7nm process. Don't confuse N7+ with N7P, the performance-improved version of 7FF....
(This is why I always try to give the full name of the process, in as much specificity as I know it; it's very easy to talk at cross purposes about N7+ and N7P despite them being quite different.)
There's more information at https://fuse.wikichip.org/news/2567/tsmc-talks-7nm-5nm-yield... or https://community.cadence.com/cadence_blogs_8/b/breakfast-by... .
(This is why I always try to give the full name of the process, in as much specificity as I know it; it's very easy to talk at cross purposes about N7+ and N7P despite them being quite different.)