IBM releases RTL source code for A2I Blue Gene/Q processor core

Re:IBM releases RTL source code for A2I Blue Gene/Q processo... by rbanffy on Tuesday June 30, 2020 @08:38AM (#23689401)

> which allows you to compile to C++

Sometimes I wish there was a tool that'd allow to compile MAME code to hardware and VHDL to code that'd be pluggable into the rest of MAME.

That'd be something.

[ Parent | on HN ]

Re:IBM releases RTL source code for A2I Blue Gene/Q processo... by monocasa on Tuesday June 30, 2020 @01:00PM (#23692146)

Higan (née bsnes) is written in a very HDL way. It's almost entirely an engine for evaluating RTL graphs with coroutines. cen64 is very similar. 'On clock edge, evaluate the next clock's input latches'.

But yes, it would be really nice to increase verilator's perf to be close to higan (which is a multi dimensional problem, latency versus throughput, etc.), so that you could compile to software or hardware. A MAME cabinet based around an FPGA with cached configuration images would be the bee's knees.

[ Parent | on HN ]