Re:Intel Discloses Lakefield CPUs Specifications
by ahupp on Wednesday June 10, 2020 @03:24PM
(#23481002)
It only has to happen once.
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Re:Intel Discloses Lakefield CPUs Specifications
by wtallis on Wednesday June 10, 2020 @03:28PM
(#23481044)
Once per process. I doubt operating systems will start modifying executables and libraries on-disk to tag them as using relevant instruction set extensions.
And generally speaking, when an application first starts issuing SIMD instructions, that's probably not the a great time to be interrupting it even if it only needs to happen once.
Re:Intel Discloses Lakefield CPUs Specifications
by gpderetta on Wednesday June 10, 2020 @05:21PM
(#23482269)
once per process is perfectly fine.
the issue is that once you have an active process using a feature only available on the larger cores, you can't shut off the larger cores to save power without paying a large latency to wake up that process.
Re:Intel Discloses Lakefield CPUs Specifications
by loeg on Wednesday June 10, 2020 @03:52PM
(#23481286)
You could imagine it as an ELF note of some kind. It's not a direction I've love to go in, and catching illegal exception traps seems fast enough that the more complicated design doesn't seem worthwhile.