Russia’s Elbrus 8CB Microarchitecture: 8-Core VLIW on TSMC 28nm

Re:Russia’s Elbrus 8CB Microarchitecture: 8-Core VLIW on TSM... by rurban on Tuesday June 02, 2020 @07:39AM (#23389951)

I find this wide addressing mode interesting

> -m128

> compile in 128-bit secure addressing mode with hardware access control to objects.

> In this mode, a pointer to data and functions takes 128 bits. It contains the 64-bit address of the object, its size (no more than 4 GB) and the position of the pointer inside the object. The mode enhances program memory control during execution.

Like Intels unused bound checking additions, it checks the starting offset and the ending offset. But without the HW hash table.

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Re:Russia’s Elbrus 8CB Microarchitecture: 8-Core VLIW on TSM... by larozin on Tuesday June 02, 2020 @04:51PM (#23396162)

There was a video on YouTube (in russian) where lead developer from MCST confess that they were unable to use this technology in practice. The entire software stack should be ported to strictly eliminate any usage of pointer magic in every place. They poured years on this and only succeed on porting libc and few small base libraries.

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