VexRiscv is a quadcore, Linux-capable RISC-V softcore for FPGA

Re:VexRiscv is a quadcore, Linux-capable RISC-V softcore for... by nullobject on Friday May 22, 2020 @01:16AM (#23268864)

This project looks amazing.

For folks writing in SpinalHDL, is anyone using Quartus? Or are you using a fully open-source toolchain? i.e. What is your workflow?

I'm interested in trying out SpinalHDL, but I'm not sure how to integrate it into what I'm doing.

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Re:VexRiscv is a quadcore, Linux-capable RISC-V softcore for... by tverbeure on Friday May 22, 2020 @02:33AM (#23269243)

I'm using SpinalHDL for all my hobby projects, and I use Intel Quartus, Xilinx ISE, or Yosys, depending on the FPGA family.

This project is an FPGA based ray-tracer that uses Xilinx ISE written in SpinalHDL: https://github.com/tomverbeure/rt. This project uses SpinalHDL to drive an LED cube, which uses Quartus: https://github.com/tomverbeure/cube (it also uses a VexRiscv). And here is a small project that drives an LED matrix with WS2812B LEDs, that runs on an Upduino2 with a Lattice UP5K FPGA, which uses open source Yosys/NextPNR: https://github.com/tomverbeure/led_matrix.

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Re:VexRiscv is a quadcore, Linux-capable RISC-V softcore for... by nullobject on Friday May 22, 2020 @02:48AM (#23269311)

Nice. I was just looking through your ray-tracer code :)

It looks like a really nice abstraction. I've been working on the MiSTer project, writing arcade cores for the Cyclone V in VHDL.

I've made a huge effort to keep things clean, but SpinalHDL could be a great way to tame some of the code.

Will start blinking some LEDs and see how it goes...

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