The DooM-chip: no CPU, no opcodes, no instruction counter

Re:The DooM-chip: no CPU, no opcodes, no instruction counter by Koshkin on Saturday May 09, 2020 @11:59AM (#23125820)

This feels like a breath of fresh air: too many FPGA applications today resort to implementing a simple CPUs (a.k.a. PSM - “programmable state machine”), and the required logic is implemented in its “machine code.”

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Re:The DooM-chip: no CPU, no opcodes, no instruction counter by monocasa on Saturday May 09, 2020 @01:56PM (#23126875)

I think you'd be surprised how many classic hardware designs take that approach as well. There's nothing wrong with that approach.

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