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Re:After 50 years of effort, researchers made silicon emit l... by MrBuddyCasino on Saturday April 11, 2020 @09:30AM (#22841574)
> In most architectures, the caches are physically addressed, so TLB lookups occur before even L1 cache access.

So to see if a memory location is contained in a cache line, a TLB lookup is needed to first get the physical address? I wouldn't have expected this, can you expand on why this is the case?

Re:After 50 years of effort, researchers made silicon emit l... by dooglius on Saturday April 11, 2020 @11:09AM (#22842038)
See Linus Torvalds' thesis, section 4.3.3 "The case against virtual data caches": https://www.cs.helsinki.fi/u/kutvonen/index_files/linus.pdf
Re:After 50 years of effort, researchers made silicon emit l... by pwildani on Saturday April 11, 2020 @11:03AM (#22842008)
If you use virtual addresses to index your caches, you have to clear them all on every process context switch.

With physical addresses, you just have to clear your TLB cache.

Re:After 50 years of effort, researchers made silicon emit l... by adwn on Saturday April 11, 2020 @11:43AM (#22842235)
Two reasons: 1) a virtual address might refer to different physical addresses (see pwildani's comment), and 2) a physical address can be mapped to different virtual addresses – a virtually addresses cache has to keep track of that somehow, otherwise the cache will become incoherent.