IBM doubles its 14nm EDRAM density, adds hundreds of megabytes of cache

Re:IBM doubles its 14nm EDRAM density, adds hundreds of mega... by hinkley on Sunday March 08, 2020 @06:53PM (#22521225)

With all of the speculation security bugs in chip cache management, I can’t help but wonder if we won’t eventually go full NUMA and turn the cache memory (or at least L2+) into a directly addressable space, either by the kernel or directly by application code. At which point your working set is explicitly on the processor, instead of implicitly.

I also wonder if chiplets will be the vehicle by which this comes to pass.

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Re:IBM doubles its 14nm EDRAM density, adds hundreds of mega... by the8472 on Sunday March 08, 2020 @07:12PM (#22521342)

Cache can already be made directly addressable (cache-as-ram mode). But outside of some niche solutions that's mostly done during boot due to the limitations of that mode and cache being too valuable.

[ Parent | on HN ]