Re:AMD Threadripper 3970X under heavy AVX2 load: Defective b...
by londons_explore on Friday February 21, 2020 @11:06AM
(#22384130)
Stalling is the way to go.
I have my doubts about this being a power issue, because localized power analysis is pretty advanced in IC design and they'd totally have tested for this.
Assuming it is a power issue though, nearly all power is used in dynamic switching, so simply inserting stall cycles will resolve it.
Power rails on silicon chips have quite a lot of capacitance, at least enough for many clock cycles, so you don't even need to make every cycle in every bit of hardware a possible stall cycle - it would be enough to simply gate instruction issue I expect and let functional units drain.
I have my doubts about this being a power issue, because localized power analysis is pretty advanced in IC design and they'd totally have tested for this.
Assuming it is a power issue though, nearly all power is used in dynamic switching, so simply inserting stall cycles will resolve it.
Power rails on silicon chips have quite a lot of capacitance, at least enough for many clock cycles, so you don't even need to make every cycle in every bit of hardware a possible stall cycle - it would be enough to simply gate instruction issue I expect and let functional units drain.