Re:CacheOut: Leaking Data on Intel CPUs via Cache Evictions
by strstr on Monday January 27, 2020 @06:10PM
(#22164846)
How do you disable TSX? I don't see a control register flag or an MSR.
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Re:CacheOut: Leaking Data on Intel CPUs via Cache Evictions
by GranPC on Monday January 27, 2020 @07:27PM
(#22165272)
MSR IA32_TSX_CTRL, introduced with a microcode update a while back.
Re:CacheOut: Leaking Data on Intel CPUs via Cache Evictions
by strstr on Monday January 27, 2020 @07:43PM
(#22165366)
Wow, it's not even in the SDM. Only docs I can find are: https://software.intel.com/security-software-guidance/insigh...
Glad it's possible to do this in virt now: used to be impossible to disable TSX (you could avoid advertising it via cpuid, but you couldn't actually prevent usage of the instructions).