Re:CPU Introspection: Intel Load Port Snooping
by gamozolabs on Monday December 30, 2019 @01:49PM
(#21915686)
In this case a privilege transition requires flushing caches. The scheduler has to be aware to not schedule two different permission levels/domains on the same core. It's a huge amount of osdev work to make hyperthreading "safe". I'll be curious if Intel doubles down on HT again.
Are you talking about software context switches or hardware (hyperthreading) ones?
If HW threading constantly clears caches wouldn't it cause a huge performance loss? Isn't that something that can occur 1-100 million times per second?
Sadly, software context switch cache clearing is pretty much given these days.