News for hackers. Stuff that matters.
Re:A Thought Experiment: Using the ECS Pattern Outside of Ga... by imtringued on Saturday December 28, 2019 @11:16AM (#21899627)
You always need a memory hierarchy. Not even DRAM is fast enough for our CPUs so we have L3 caches and those are not fast enough either so we also have L2 and L1 caches and registers and physical wires which temporarily store the state of the processor by taking advantage of propagation delays.

There are no comments on this comment yet.