MMUs work on much larger regions than what is useful for many classes of memory safety issues. Luckily, ARMv8.5 adds support for memory tagging at a more granular level.

Aha, a chance to mention my favourite dead processor design, the 432, which had an MMU designed to work at much finer, object-sized, granularity:

https://en.wikipedia.org/wiki/Intel_iAPX_432#Object-oriented...

Here's a presentation from lowrisc.org on their plans for tagged memory on a RISCV chip: https://riscv.org/wp-content/uploads/2017/05/Wed0930riscv201...

Let's resurrect segments!