Re:Intel’s Manufacturing Roadmap from 2019 to 2029
by marcosdumay on Thursday December 12, 2019 @03:06PM
(#21775793)
> connected to an I/O hub talking to a bunch of PCIe5 lanes and a huge pile of DDR6 RAM
So, basically a mainframe on a chip?
Honestly, how would that work? Is all that memory coherent? There are a couple of reasons why mainframes cost so much, and some of them are technical.
I keep expecting servers to evolve into a multi-CPU non-coherent RAM, but the industry keeps doubling down on coherent RAM¹. At some point servers will turn into a single-board blade hack (that you can mount on a blade hack, piled on a hack), I wonder for how long CPU designers can sustain our current architecture.
1 - Turns out people working full time on the problem have more insight on it than me, go figure.
So, basically a mainframe on a chip?
Honestly, how would that work? Is all that memory coherent? There are a couple of reasons why mainframes cost so much, and some of them are technical.
I keep expecting servers to evolve into a multi-CPU non-coherent RAM, but the industry keeps doubling down on coherent RAM¹. At some point servers will turn into a single-board blade hack (that you can mount on a blade hack, piled on a hack), I wonder for how long CPU designers can sustain our current architecture.
1 - Turns out people working full time on the problem have more insight on it than me, go figure.