Nope, done right the cost is a layer of 2:1 muxes and some control logic to pass data between decoders, and 16 flops to hold a partially decoded instruction between fetch bundles

It's more complicated than that if you want to decode multiple instructions per cycles, which you have to for high-end designs. I still agree with monocasa that it's almost certainly going to be worth it for the reduced I$ pressure.

For sure, it's just that this little bit could necessitate a pipeline stage if that was the critical timing path somehow already. Just trying to be as friendly to their argument as possible before taking it on.