Re:How to set up Xilinx Vivado for source control
by unixhero on Tuesday November 19, 2019 @12:15AM
(#21570801)
So every time you compile/synthesize the result is different?
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Re:How to set up Xilinx Vivado for source control
by odmkSeijin on Tuesday November 19, 2019 @01:08AM
(#21570974)
Not with the same exact source files / same software version. But sometimes small changes in the design, or changing tool versions can cause the design to not meet timing. It's just the nature of map / place and route.
Re:How to set up Xilinx Vivado for source control
by duskwuff on Tuesday November 19, 2019 @04:47PM
(#21578659)
It often is. Place-and-route is typically implemented as simulated annealing, which is a randomized algorithm. Unless you explicitly force it to reuse the same seed, you'll get slightly different results each time -- and even if you do set a seed, small changes to the HDL may result in a vastly different result.