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Re:NUVIA: New Server CPU Startup Going After Intel and AMD by _nhynes on Saturday November 16, 2019 @11:16AM (#21553344)
Wasm itself doesn’t have any environment functions that would allow things like managing page tables or networking. I think that what you might see is a RISC-V JIT with a ring-0 Wasm runtime compiled to native. Kind of like https://github.com/nebulet/nebulet, probably
Re:NUVIA: New Server CPU Startup Going After Intel and AMD by FullyFunctional on Sunday November 17, 2019 @05:01PM (#21560313)
The interesting thing about WASM is that it's an amazing representation[1] to translate from; certainly much more attractive than binary translation from a legacy ISA (maintaining the illusion of the original ISA carry a substantial tax). As thus, it allows you freedom to innovate something radically different, like TRIPS/EDGE radical.

I'd much rather translate from that than create the compiler backend and the entire toolchain.

[1] It's not perfect alas, as there are still many things the compiler knows that is lost in translation, such as the complete static alias sets of memory operations, true range limits on values, etc. For some of this we burn power today trying to (re-) discover at run-time (like the memory disambiguator).

Re:NUVIA: New Server CPU Startup Going After Intel and AMD by neftaly on Saturday November 16, 2019 @05:41PM (#21555420)
Oh there's still a lot of work to do before it's possible, but things like WASM pthreads, gc, etc are moving along.