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Re:Bipolar-Zener Combo Takes On CMOS by colechristensen on Tuesday October 22, 2019 @02:16PM (#21326913)
I guess all you would have to do is to make sure the precision was a few dB/bits more accurate than 16/32/64 bit floating point for a certain sigma probability and a lot of people would be perfectly happy with it.
Re:Bipolar-Zener Combo Takes On CMOS by arcticbull on Tuesday October 22, 2019 @02:55PM (#21327274)
I wonder if you could use it as an efficient starting point for various different integer division algorithms which rely on a rough starting point. For instance, it could be your X_0 estimate for (1/D) in the Newton-Rhapson method [1]. Or, potentially, as a high-quality first stage input for a successive-approximation approach [2].

This could allow you to get a rough approximation incredibly quickly and opt to refine it further using it as a high-quality input to speed up finding the "true" answer.

[1] https://en.wikipedia.org/wiki/Division_algorithm

[2] http://www.ijiee.org/papers/173-E0005.pdf

Re:Bipolar-Zener Combo Takes On CMOS by cardiffspaceman on Tuesday October 22, 2019 @05:16PM (#21328570)
The trade off would be that your A-D converter would have to be fast enough as well as offer enough bits of result to give the iterative algorithm a running start. Digital video cameras would be the class of device we ~all have that does high-samples-per-second conversion. A 4K@60p camera has to do 500Ms/s at least so if you can allow that many approximate results per second then it might work out. There would also have to be a comparably fast DAC to tell the analog circuit what you want to approximate.

I think a more-complete computing engine in analog would be a bigger win, because there won't be conversion overheads. Or as was suggested somewhere in this topic, a field-programmable analog array.