Re:Goodbye, Motherboard. Hello, Silicon-Interconnect Fabric
by BAReF00t on Thursday September 26, 2019 @07:33AM
(#21079943)
It’s not just about faults.
But about customizability and upgrades!
I like to choose how much RAM and storage and which ports I want with how many generic, vector, FPGA and neural cores, thank you very much.
And I like to change them later, to upgrade gradually. Even buses.
Re:Goodbye, Motherboard. Hello, Silicon-Interconnect Fabric
by pas on Friday September 27, 2019 @02:45AM
(#21089125)
This is currently targeting non-serviced computers. Eg data center and mobile/embedded. Where you replace the whole unit anyway.
Re:Goodbye, Motherboard. Hello, Silicon-Interconnect Fabric
by BAReF00t on Saturday September 28, 2019 @11:26AM
(#21100840)
Aka something that should never be that way in the first place.
Re:Goodbye, Motherboard. Hello, Silicon-Interconnect Fabric
by jdnenej on Thursday September 26, 2019 @05:25AM
(#21079437)
That doesn't seem to solve the issue of when a chip fails all together. While difficult, it's not impossible or unheard of for people to replace chips on a PCB like a charge controller that has fried.
Re:Goodbye, Motherboard. Hello, Silicon-Interconnect Fabric
by nine_k on Wednesday September 25, 2019 @09:41PM
(#21077385)
Big CPUs / GPUs already have physical redundancy, and a way to cut / rewire a limited amount of faulty parts by laser etching in the die, prior to packaging.
Re:Goodbye, Motherboard. Hello, Silicon-Interconnect Fabric
by monocasa on Wednesday September 25, 2019 @11:25PM
(#21077884)
Cell processors are interesting because they do quite a bit of binning on a user facing SPI slave. You shift a thousand or so bit payload into it from a support/binrg up processor that tells it which pieces are disabled, how the PLLs are configured, etc.
Hacked PS3s could reenable the binned off 8th SPE for instance.
"We also need to consider system reliability. If a dielet is found to be faulty after bonding or fails during operation, it will be very difficult to replace."
Their proposed solution (which is not repair):
"Therefore, SoIFs, especially large ones, need to have fault tolerance built in. Fault tolerance could be implemented at the network level or at the dielet level. At the network level, interdielet routing will need to be able to bypass faulty dielets. At the dielet level, we can consider physical redundancy tricks like using multiple copper pillars for each I/O port."
Your point is still valid, just wanted to call out their their thoughts on the issue.