Cerebras Systems unveils a 1.2T transistor chip for AI

Re:Cerebras Systems unveils a 1.2T transistor chip for AI by Veedrac on Monday August 19, 2019 @09:47PM (#20743211)

You basically have the option between SRAM, HBM (DRAM), and something new. You can imagine the risks with using new memory tech on a chip like this.

The issue with HBM is that it's much slower, much more power hungry (per access, not per byte), and not local (so there are routing problems). You can't scale that to this much compute.

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Re:Cerebras Systems unveils a 1.2T transistor chip for AI by gwern on Tuesday August 20, 2019 @09:47AM (#20746963)

But HBAM and other RAMs are, presumably, vastly cheaper otherwise. (You can keep explaining that, but unless you work for Cerebras and haven't thought to mention that, talking about how SRAM is faster is not actually an answer to my question about what paradigm is intended by Cerebras.)

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Re:Cerebras Systems unveils a 1.2T transistor chip for AI by Veedrac on Tuesday August 20, 2019 @02:23PM (#20750229)

They say they support efficient execution of smaller batches. They cover this somewhat in their HotChips talk, eg. “One instance of NN, don't have to increase batch size to get cluster scale perf” from the AnandTech coverage.

If this doesn't answer your question, I'm stuck as to what you're asking about. They use SRAM because it's the only tried and true option that works. Lots of SRAM means efficient execution of small batch sizes. If your problem fits, good, this chip works for you, and probably easily outperforms a cluster of 50 GPUs. If your problem doesn't, presumably you should just use something else.

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