Re:EPYC SAP-SD 2-tier benchmark results
by throwaway2048 on Saturday August 10, 2019 @08:59AM
(#20661796)
Intel's blocking of ECC features is entirely arbitrary and artificial, the dies themselves already support it, they just disable it for consumer chips.
To be fair the single socket, low core count Xeons are not that pricey unless you try to match clock speed with the consumer chips... But, priorities, right?