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Re:MIPS R3000 by alain94040 on Thursday June 20, 2019 @02:53PM (#20236014)
It makes the hardware implementation more complicated. The delay slot was perfect for the 5-pipeline original design. Once you try to push this to out of order execution (executing more than one instruction per cycle), the delay slot just doesn't make any sense.
Re:MIPS R3000 by blu42 on Friday June 21, 2019 @04:19AM (#20240826)
That's my understanding as well. Software-wise, I, for one, have not had issues with reading or writing code with branch delay slots -- automatic nops, at worst. I guess it all depends how early in one's development they were introduce to the concept of delay slots.