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A comment on MDS: Microarchitectural Data Sampling side-channel vulnerabilities in Intel CPUs. Parent comment

Re:MDS: Microarchitectural Data Sampling side-channel vulner... by silversconfused on Tuesday May 14, 2019 @02:39PM (#19912486)
One CPU per process makes a lot more sense, especially now that we have so many specialized CPUs in our machines anyway.
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Re:MDS: Microarchitectural Data Sampling side-channel vulner... by rightbyte on Tuesday May 14, 2019 @03:39PM (#19913110)
Ye I got a feeling that shared processor time with strangers is not viable without specialized hardware.
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Re:MDS: Microarchitectural Data Sampling side-channel vulner... by snovv_crash on Tuesday May 14, 2019 @05:40PM (#19914139)
I think it isn't viable with non-deterministic (in time) hardware behavior. This means dedicated caches, or no caches at all. Dedicated guaranteed memory speeds and latencies. Dedicated processing units. The untrusted code cannot be affected by other code, otherwise the other code leaks its usage patterns across.
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