From the brochure, it had a few million of 64-bit words worth of RAM that was used as regular RAM ("central memory") and a lot more of ECC DRAM that was used as fast storage ("SSD"). What was the API for the SSD? Was it mapped into virtual memory as RAM, or did the ISA have I/O in,out opcodes for it with word address, or did it use the API for disk storage, or what?

Even the Cray-1S supported it! I believe it was connected via a 128-bit wide bus operating at the system clock speed (80 MHz in the case of the Cray-1), which made it a ~10 gbit interface. From a low-level software perspective, it was connected to a pair of DMA "channels" (1 input / 1 output), and there were instructions to do bulk copies from SRAM->CHANNEL or CHANNEL->SRAM. It may have used another slower channel pair as a command interface, but I'm not sure (nor how COS or UNICOS exposed it from a higher level software perspective).

They sure did! It came in 256-, 512- and 1024-MB flavors, if i recall, in its own cabinet off to the side at a blazing 1000MB/s.

I don’t have a hunk of the SSD, but I have a (30lb) board of the central memory perched against my desk right now.