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A comment on Verilog sources for Western Digital's open source RISC-V core. Parent comment

Re:Verilog sources for Western Digital's open source RISC-V ... by zeelman on Sunday January 27, 2019 @04:06PM (#19013784)
I graduated CE and worked for 11 years with digital design and FPGAs in silicon valley. The salaries haven't kept up. I transitioned to SW and I'm not going back.
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