Verilog sources for Western Digital's open source RISC-V core

Re:Verilog sources for Western Digital's open source RISC-V ... by jhallenworld on Sunday January 27, 2019 @12:20PM (#19012621)

I'm curious if the FPGA tools support the system verilog syntax that this is using. I'm an FPGA designer, but have not switched to system verilog.

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