Re:Verilog sources for Western Digital's open source RISC-V ...
by garmaine on Sunday January 27, 2019 @12:00PM
(#19012529)
Because you’re comparing a workstation class out-of-order CPU design to a teeny tiny embedded chip lacking an FPU or even a unified code/data cache. It’s like saying “how does the Intel Atom compare against the AMD Ryzen Threadripper core?”
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