Re:Verilog sources for Western Digital's open source RISC-V ...
by tyingq on Sunday January 27, 2019 @08:43AM
(#19011638)
This one doesn't have out of order processing, a FPU, or a MMU. It's also 32 bit where BOOM is 64.
Edit: There is a little more detail available for an existing Marvell ARM SATA controller (similar to what WD uses now), which this processor is probably the replacement for[1]. That indicates it has 2 ARM Cortex R4 cores. On the Cortex R4, it looks like the FPU is an optional feature, and there is no MMU, just an MPU[2].
Basically, it looks like the BOOM CPU is intended to be a general purpose CPU, and this is intended to be a very fast/capable microcontroller. It wouldn't run Linux, other than maybe something like uClinux.
Edit: There is a little more detail available for an existing Marvell ARM SATA controller (similar to what WD uses now), which this processor is probably the replacement for[1]. That indicates it has 2 ARM Cortex R4 cores. On the Cortex R4, it looks like the FPU is an optional feature, and there is no MMU, just an MPU[2].
Basically, it looks like the BOOM CPU is intended to be a general purpose CPU, and this is intended to be a very fast/capable microcontroller. It wouldn't run Linux, other than maybe something like uClinux.
It does look to be potentially REALLY fast. See https://www.anandtech.com/show/13678/western-digital-reveals...
[1] https://www.marvell.com/storage/assets/Marvell_88i9441_Solei...
[2] https://developer.arm.com/products/processors/cortex-r/corte...