Re:Chip Industry's Fundamental Shifts in 2018
by gumby on Saturday December 22, 2018 @08:35PM
(#18743792)
Content addressable memories are a commonly used example.
Harvard architecture machines are still used in embedded processors; among other things they can provide some hardware security impossible in a von Neumann architecture.
They are interpreting "Von Neumann" somewhat loosely; on a more strict basis (though I consider it nonsense), the only real NV machines were minicomputers like the PDP-11 or micros until recently. Mainframes had plenty of processing units beyond the CPU (what, after all, was a channel controller) and modern systems have cpus embedded in disk drives, in the PHY of all sorts of devices etc...not to mention that a modern "machine" can be a machine-room-scale system with lots of subunits.
Even at the level the semi guys are talking about the current processors are a far cry from what Von Neumann wrote of, with multiple functional units, asymmetric processors, caches etc -- make a mockery of the simplistic CPU model of ALU, single path to memory etc.
Harvard architecture machines are still used in embedded processors; among other things they can provide some hardware security impossible in a von Neumann architecture.
They are interpreting "Von Neumann" somewhat loosely; on a more strict basis (though I consider it nonsense), the only real NV machines were minicomputers like the PDP-11 or micros until recently. Mainframes had plenty of processing units beyond the CPU (what, after all, was a channel controller) and modern systems have cpus embedded in disk drives, in the PHY of all sorts of devices etc...not to mention that a modern "machine" can be a machine-room-scale system with lots of subunits.
Even at the level the semi guys are talking about the current processors are a far cry from what Von Neumann wrote of, with multiple functional units, asymmetric processors, caches etc -- make a mockery of the simplistic CPU model of ALU, single path to memory etc.