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A comment on AMD’s aggressive pricing update on the EPYC 7371. Parent comment

Re:AMD’s aggressive pricing update on the EPYC 7371 by paulmd on Friday December 07, 2018 @06:49PM (#18632752)
They're doing the same thing they are now with AVX2, but with AVX-512. So 512b instructions will translate into two uops.

It's still useful to implement the AVX-512 instructions because they fill in some holes in the existing AVX instruction sets (eg lack of scatter/broadcast instructions) and implement a new SIMT-like op-masking functionality.

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Re:AMD’s aggressive pricing update on the EPYC 7371 by bayindirh on Sunday December 09, 2018 @11:29AM (#18641625)
Wikichip doesn't list AVX512 as supported. Am I missing something in the spec sheet?

Maybe compilers are emulating AVX512 behavior with other instructions when targeting Zen/Zen+/Zen2 directly?

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