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A comment on Open source RISC-V implemented from scratch in one night.

Re:Open source RISC-V implemented from scratch in one night by kbumsik on Tuesday August 28, 2018 @11:32PM (#17865354)
I don't know anything about RISC-V ISA yet, but I am wondering if its ISR is great for learning computer architecture in shcools compared to MIPS, the dominant ISR at colleges for introductory computer architecture classes?

The HDL (Verilog) code looks quite short and simple. If the partial implementation of the ISR implementation is like that it shouldn't be so bad for learning...

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Re:Open source RISC-V implemented from scratch in one night by xmo on Wednesday August 29, 2018 @12:00AM (#17865494)
Yes. Berkeley started using it to teach introductory computer architecture: http://www-inst.eecs.berkeley.edu/~cs61c/sp18/

A major project of the course is to build RISVC emulator and implement 2-stage pipeline in logisim.

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Re:Open source RISC-V implemented from scratch in one night by henrikeh on Wednesday August 29, 2018 @01:05AM (#17865800)
The technical university of Denmark also transistioned to teaching computer arch using RISC-V. Some of the most popular textbooks are also being converted to RISC-V editions.
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Re:Open source RISC-V implemented from scratch in one night by kbumsik on Wednesday August 29, 2018 @12:50AM (#17865729)
Well Berkeley would certainly wants to teach RISC-V since Berkeley made that architecture. But it is still great to see they are actually using it in classes!
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Re:Open source RISC-V implemented from scratch in one night by bogomipz on Wednesday August 29, 2018 @08:49AM (#17867790)
Wow this is great! Do you or anyone else happen to know if any of the lecture videos for this course might be available online?
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Re:Open source RISC-V implemented from scratch in one night by tomku on Wednesday August 29, 2018 @09:24AM (#17868005)
Yes, it was designed with educational applications in mind.
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Re:Open source RISC-V implemented from scratch in one night by bogomipz on Wednesday August 29, 2018 @08:45AM (#17867768)
What does ISR stand for in this context?
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Re:Open source RISC-V implemented from scratch in one night by kbumsik on Wednesday August 29, 2018 @09:03AM (#17867878)
Opps, typo ;) It's ISA. Sorry for my English. Maybe because I'm used to type ISR (Interrupt Service Routine) at work.
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Re:Open source RISC-V implemented from scratch in one night by userbinator on Tuesday August 28, 2018 @11:41PM (#17865407)
It's very similar to MIPS.
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