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A comment on The MRISC32 – A vector first CPU design. Parent comment

Re:The MRISC32 – A vector first CPU design by mbitsnbites on Sunday August 26, 2018 @05:19PM (#17847996)
Update: I just moved the scalar register file to block RAM, and now the pipeline uses ~1800 ALMs, or 9% of the chip logic.
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