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Re:Porting SBCL to the RISC-V by Annatar on Sunday August 12, 2018 @08:23AM (#17744043)
This has got to be the first processor for which the software is available before a complete computer exists; RISC-V 19” rack mountable servers remain distant science fiction.
Re:Porting SBCL to the RISC-V by floatboth on Sunday August 12, 2018 @08:29AM (#17744059)
Nah, certainly not the first. Lots of software was ported to AArch64 before any chips existed, only ARM's "Foundation Model" (a rather slow emulator).
Re:Porting SBCL to the RISC-V by microcolonel on Sunday August 12, 2018 @02:19PM (#17745604)
Not to mention, there is actual RISC-V hardware capable of running this software; and you can buy it right now for a known public price (which is more than could be said for AArch64 for a long time, and almost to this day) and integrate it with standard peripherals (PCIe, SATA, USB, etc.).

Granted, the hardware is somewhat limited for now, since it's only in-order.

Re:Porting SBCL to the RISC-V by floatboth on Monday August 13, 2018 @06:46AM (#17749191)
> you can buy it right now for a known public price

Huh, the HiFive Unleashed has a "buy now" button on the website. I thought it's still in crowdfunding stage. Nice.

> almost to this day

PINE A64 was kickstarted in december 2015 with a known public price of $15. The RPi3 and SoftIron Overdrive 1000 appeared in 2016, SolidRun MACCHIATOBin in 2017, and various Rockchip RK3399 boards (and Chromebooks!) are shipping this year.

Oh, and you could buy an iPhone 5S back in 2013. No standard peripherals on that one though :D

Re:Porting SBCL to the RISC-V by Annatar on Monday August 13, 2018 @03:11AM (#17748500)
Servers, I explicitly wrote “19” rack mountable servers”!

Where can they be bought? Link please!!!

Re:Porting SBCL to the RISC-V by floatboth on Monday August 13, 2018 @07:23AM (#17749299)
You could mount a HiFive Unleashed into a rack case I guess. It's not a standard form factor though, so you'd need some custom mounting hardware (or, well, hot glue :D)
Re:Porting SBCL to the RISC-V by Annatar on Monday August 13, 2018 @04:11PM (#17753210)
That would be hacking. I couldn’t build datacenters with that. I’m a professional engineer, not a hacker.
Re:Porting SBCL to the RISC-V by adiusmus on Sunday August 12, 2018 @10:39AM (#17744535)
Ada Lovelace disagrees.
Re:Porting SBCL to the RISC-V by Annatar on Monday August 13, 2018 @03:15AM (#17748513)
She most certaily does not, since she is dead. And she helped Babbage construct the first mechanical computer so I most certaily disagree with your implication, since it is wrong.
Re:Porting SBCL to the RISC-V by adiusmus on Monday August 13, 2018 @05:10AM (#17748856)
Yeah she’s dead. Well spotted.

Here’s some documentation https://en.m.wikipedia.org/wiki/Babbage_Machine

Feel free to provide year the machine was actually completed by Babbage and Lovelace. A photo or two would be nice.

Trolls these days are still cute to their mothers.

Re:Porting SBCL to the RISC-V by Annatar on Monday August 13, 2018 @05:20AM (#17748905)
Wow. One can construct something on paper without actually building it, but since you’re content to argue, I expect no less than you now arguing on the semantics of “to construct”. I’ll discard the troll implication as immature, since this is “Hacker News”, so I can’t say I’m surprised.
Re:Porting SBCL to the RISC-V by adiusmus on Monday August 13, 2018 @05:47AM (#17749027)
I’m content knowing you won’t back up your claims because you know you’re wrong.

Have interesting times.

Re:Porting SBCL to the RISC-V by Annatar on Monday August 13, 2018 @07:18AM (#17749274)
“Have interesting times.”

Always, but that’s not for you to tell me.

Re:Porting SBCL to the RISC-V by Athas on Sunday August 12, 2018 @08:42AM (#17744104)
Linux has supported x86-64 in long mode since 2001, well before the processors were available two years later.
Re:Porting SBCL to the RISC-V by aap_ on Sunday August 12, 2018 @01:27PM (#17745348)
Interestingly, LISP for the PDP-6 was begin written while the machine was still being built.
Re:Porting SBCL to the RISC-V by nils-m-holm on Sunday August 12, 2018 @04:29PM (#17746255)
Very interesting indeed! Do you have any sources?
Re:Porting SBCL to the RISC-V by dangerbird2 on Sunday August 12, 2018 @06:16PM (#17746740)
Here [1], Richard Greenblatt wrote A Lisp interpreter/compiler for PDP-6 in 1963 (it would become MacLisp), while the computer was still being designed.

[1] http://www.softwarepreservation.org/projects/LISP/maclisp_fa...

Re:Porting SBCL to the RISC-V by nils-m-holm on Monday August 13, 2018 @04:08AM (#17748670)
Great, thanks!
Re:Porting SBCL to the RISC-V by PeCaN on Sunday August 12, 2018 @12:50PM (#17745187)
Itanium and AArch64 both had emulators years before they were released and OSes were ported before any chips were available.
Re:Porting SBCL to the RISC-V by rwmj on Monday August 13, 2018 @05:31AM (#17748960)
I've got two real RISC-V machines (HiFive Unleashed) under my desk.
Re:Porting SBCL to the RISC-V by Annatar on Monday August 13, 2018 @07:26AM (#17749305)
“HiFive Unleashed is the ultimate RISC-V developer board.”

A development board is light years away from a 19” rack mountable server with out-of-band management (lights out management) and everything else that goes into such a design. You know, the kind of hardware that is actually usable in production and not just a cool toy that might or might not spawn production systems some day. I for one am not content to just tinker with toys; I want servers so I can get some real work done.

Re:Porting SBCL to the RISC-V by rwmj on Tuesday August 14, 2018 @05:57AM (#17756565)
Erm yes, so do I. In fact I gave a talk about this and I'm involved in the software side. https://www.youtube.com/watch?v=HxbpJzU2gkw

These things don't happen by force of nature. They happen because people do the work, and we're doing the work, not moaning on HN about things that haven't happened yet.

Re:Porting SBCL to the RISC-V by Annatar on Thursday August 16, 2018 @04:43AM (#17773033)
Sorry but you (plural) are moaning about a very badly thought out processor architecture for which no hardware other than tinkertoys exist, to the point where one could equal it with the Rust evangelism strike force. I’m really sorry that is the case, especially when I think back on how awful the assembler mnemonics of RISC-V are, and how all the work being done could have made so much more difference if it had been put into OpenSPARC, as if we didn’t have enough ego trips and repetition in the computer hardware space throughout the decades already. Why reuse all the work and refine one CPU design when one can just sink countless hours of one’s life into inventing it again, right? Sorry but that is just awful. You (now in singular) will never get that time back. I silently weep for the wastefulness of humanity inside of me when I think upon this debacle that is RISC-V.