Re:Exploring .NET Core platform intrinsics: Part 4 – Alignme...
by zvrba on Sunday July 22, 2018 @03:40AM
(#17585700)
Further optimization potential: the four lines
have all a serializing dependency on sum variable. But (integer) addition is associative and commutative, so you could sum it in a tree-like manner, ending up only with a a single serializing dependency:
Where only the last line serializes with the previous one. Maybe the HW is smart enough to rename the registers and do the same thing internally, but it'd be interesting to benchmark it.
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Re:Exploring .NET Core platform intrinsics: Part 4 – Alignme...
by Metalnem on Sunday July 22, 2018 @04:24AM
(#17585832)
I already tried that, but was disappointed that the performance gain was only 1%, which is why I didn't include the optimization in the post.
Re:Exploring .NET Core platform intrinsics: Part 4 – Alignme...
by physguy1123 on Sunday July 22, 2018 @07:01PM
(#17589360)
You should try maintaining 4 independent sum variables and summing after the loop so there's no serializing dependency at all. Such a transformation in microbenchmarks is a fun trick to show the power of a proper OOO engine with pipelined instruction units. Assuming no memory problems, one should be able use issue-width*instruction latency independent sum streams without spending more time in the hot loop.
For what it's worth, the vmovdqa only has a 4-wide issue width if it is moving between registers, the memory load has a 2-wide issue width. Floating point adders themselves only have a 1-2 wide issue widths depending on your hardware so it doesn't really matter.