I used to work in the industry and caught this article a few days ago during my usual arXiv trawling. Prof Reed's group has put out a few papers on erasable ion-implanted waveguides over the past couple of years from different angles, most notably erasable optical test points in circuits. The "FPGA" part is a bit of marketing because the waveguide erasure cannot be undone, but I do believe the last bit where the circuit topology is permanently altered between different optical communication protocols has some merit. This would enable manufacturers to be more nimble about which chips they can deliver based on demand, and might offer a yield recovery mechanism in a similar manner to which fuses are used on logic chips to disable non-functioning parts of the chip during the chip "Sort" step.

Overall, good paper.