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A comment on Cervus: A WebAssembly subsystem for Linux. Parent comment

Re:Cervus: A WebAssembly subsystem for Linux by naasking on Wednesday May 30, 2018 @08:08AM (#17187007)
The cost of context switching is near zero. No need for expensive TLB flushes, for instance. No need for paged memory whose overhead sometimes accounts for up to 50% of program runtimes. Better isolation properties, since you can sandbox individual objects instead of whole processes.
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Re:Cervus: A WebAssembly subsystem for Linux by lkurusa on Wednesday May 30, 2018 @08:50AM (#17187245)
> expensive TLB flushes

Note that modern CPUs store a tag of the current "address space ID" next to the TLB line, thus the cost of the flushing is heavily reduced.

> No need for paged memory

Unless you mean swapping, this doesn't apply as x86_64 long mode requires paging to be enabled.

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Re:Cervus: A WebAssembly subsystem for Linux by naasking on Wednesday May 30, 2018 @08:54AM (#17187270)
> Note that modern CPUs store a tag of the current "address space ID" next to the TLB line, thus the cost of the flushing is heavily reduced.

Yes, tagged TLBs are much better, but the overhead is still not negligible. You can check the microkernel literature for all of the inefficiencies encountered in modern CPUs, and a language-based OS would eliminate most of them because protection is moved into the language itself.

> Unless you mean swapping, this doesn't apply as x86_64 long mode requires paging to be enabled.

a) This benefits from better caching since there's only one set of page tables, and b) CPUs are designed around the common uses, so if this OS design catches on, you'll start seeing CPUs that don't require page tables.

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Re:Cervus: A WebAssembly subsystem for Linux by monocasa on Wednesday May 30, 2018 @11:26AM (#17188427)
> Note that modern CPUs store a tag of the current "address space ID" next to the TLB line, thus the cost of the flushing is heavily reduced.

Except you flush the TLBs as part of the meltdown mitigation.

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