Hah, yeah that wasn't a substitution I'd seen before. They really should have just called out Fin-FET process compatibility since all of those are below 20nm.

1x, 1y, and 1z nomenclature is standard in the memory industry, where the foundries are less keen on giving out hard numbers about their manufacturing processes than the logic fabs are.

FinFETs don't have anything to do with ReRAM (or MRAM), since the memory is a back-end construction. When designing the memory, you don't have to care about whether the underlying transistors are planar or FinFET, you just need to know whether the memory can scale down to the same pitch. There will be 12nm planar FD-SOI chips taping out next year at GloFo, so 1x nm for a logic process doesn't imply FinFETs, and FinFETs aren't all smaller than 20nm.