New chip reduces neural networks’ power consumption

Re:New chip reduces neural networks’ power consumption by Invictus0 on Thursday February 15, 2018 @01:58PM (#16386527)

Correct me if I'm misunderstanding something, but won't this chip need a ton of ADCs to process these computations?

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Re:New chip reduces neural networks’ power consumption by arcticbull on Thursday February 15, 2018 @03:01PM (#16387064)

DACs on one end and ADCs on the other, yeah. I guess though, it may be possible to hook analog inputs directly to it in some way, such as a camera or mic.

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Re:New chip reduces neural networks’ power consumption by neolefty on Thursday February 15, 2018 @03:28PM (#16387309)

But if it's one-bit values, they're simple and fast -- ADC is just a threshold, and DAC is a step function.

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Re:New chip reduces neural networks’ power consumption by ky738 on Thursday February 15, 2018 @04:07PM (#16387629)

This guy studied signal processing.

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Re:New chip reduces neural networks’ power consumption by deepnotderp on Thursday February 15, 2018 @03:56PM (#16387559)

Shhhh. When it comes to analog computing, discussing reality is not appreciated.

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Re:New chip reduces neural networks’ power consumption by twtw on Thursday February 15, 2018 @08:41PM (#16389291)

1. Single bit ADC/DACs are trivial.

2. CDAC + switched capacitor multiplier + SAR ADC can be competitive with digital multiplier.

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Re:New chip reduces neural networks’ power consumption by deepnotderp on Thursday February 15, 2018 @08:49PM (#16389310)

1. Yes, and the advantage of analog is significantly reduced as well, as a binary multiply and add then reduce to single gate operations.

2. Switched capacitor multipliers (actually almost anything analog) have difficulty scaling with feature shrinks, and that's before considering noise. E.g. see all the difficulties Xilinx went through to get 16nm FinFET ADCs efficiently working.

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