From the blog post is the link to the fairly recent NIPS presentation: https://supercomputersfordl2017.github.io/Presentations/Imag...
which claims 2400 GB/s for the board and 600 GB/s per “chip”.
which claims 2400 GB/s for the board and 600 GB/s per “chip”.
In any case I agree, we shouldn't be looking at the stated peak compute of either of the chips.
(Disclaimer: I work at Google on XLA, and have in the past worked on TPUs.)