I've never actually priced out an application where FPGAs were competitive on raw compute power -- GPUs have always smoked them for the tasks I was interested in, and not by a small margin. We only ever used them because they were "hardware engineer duct-tape" -- they let us talk to chips, network, and system busses at high bandwidth / pin count. Real time pipelines were a bonus but memory and compute were so much cheaper on computers that buffers + overprovisioning were a much more attractive real time solution wherever the logistics weren't prohibitive. Often they were, though, forcing us to use FPGAs for compute even though they weren't particularly good at it.

I have a sneaking suspicion that this is a more general truth and that in many applications where FPGAs are touted as compute accelerators they were actually chosen to minimize the length of the critical real-time data path rather than to do more computation for fewer dollars.