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Re:Ask HN: Is the Mill CPU Vulnerable to Spectre? by jecel on Friday January 12, 2018 @02:12PM (#16135445)
Note that these problems are not inherent to out of order implementations. Dan Ingalls (who first implemented Smalltalk) said "you can cheat as long as you don't get caught". When speculation fails, all side effects are rolled back in x86 and ARM processors except reads to the cache since these were considered harmless. Writes to the cache are already rolled back so not doing so for reads just saves circuit complexity. There is no reason why this can't be added to the next chip designs, though nothing can be done about what is already out there.

As for the Mill, it has enough differences that these attacks wouldn't work on it. Just the separation between protection and translation, for example, would stop Meltdown in its tracks.

Re:Ask HN: Is the Mill CPU Vulnerable to Spectre? by willvarfar on Saturday January 13, 2018 @09:04AM (#16139643)
It is flawed to 'roll back' changes. Instead, those changes have to have never existed. Otherwise, there is a short window of time when the cache-visible side-effects have happened, and haven't been rolled back yet, and the attacker can see them (due to preemption, due to hyperthreading, due to running in another core etc).