Re:Intel vs GlobalFoundries at the leading edge
by mdaverveldt on Monday December 18, 2017 @03:20PM
(#15955104)
Actual logic design is done using standard cells so metrics describing standard cell size are more useful.
Is it really the case that all logic designs use standard cells? I would have expected full custom designs to maybe use a standard design for the transistor but the placement and sizing of the gates is completely custom (e.g. not on a grid).
Is it really the case that all logic designs use standard cells? I would have expected full custom designs to maybe use a standard design for the transistor but the placement and sizing of the gates is completely custom (e.g. not on a grid).