Re:Seventh RISC-V Workshop: Day Two
by microcolonel on Thursday November 30, 2017 @09:21AM
(#15815848)
There are some natural limits on how open cutting edge semiconductors can be, particularly at the foundry/process level. As foundries start more or less giving up on smaller features (at least in silicon), I think we'll see more opportunities for openness at that level.
If the foundry stands to gain more by publishing the price list, cell library, and toolchain than they do by keeping it secret, that'll be the time for it to happen.
If the foundry stands to gain more by publishing the price list, cell library, and toolchain than they do by keeping it secret, that'll be the time for it to happen.