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A comment on Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year. Parent comment

Re:Western Digital Plans to Ship More Than One Billion RISC-... by pedroaraujo on Tuesday November 28, 2017 @03:57PM (#15801520)
RISC-V is not an architecture, it is just an instruction set. People still need to design the architecture for an implementation of RISC-V.

Intel ME is a co-processor that runs at the same time as the main processor, it is not related to the instruction set.

To answer your question: Intel ME is a problem that happens on an higher level than the document that defines instruction set.

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Re:Western Digital Plans to Ship More Than One Billion RISC-... by fulafel on Tuesday November 28, 2017 @04:07PM (#15801644)
There are "instruction set architecture" and "microarchitecture" (=specific implementation of an ISA). ISA is the one more commonly referred to as just architecture, I think.
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