Re:“Last Mile” Barriers to Removing Legacy BIOS [pdf]
by wolfgke on Sunday November 19, 2017 @07:39AM
(#15733640)
> Regarding the 2/3-operand instruction problem, this is very interesting but must admit I need to do some reading about graph theory. I do very vaguely understand it but for example https://en.wikipedia.org/wiki/Graph_theory doesn't mention the world "chord" anywhere.
Concerning chordal graphs:
> https://en.wikipedia.org/w/index.php?title=Chordal_graph&old...
Concerning using graph coloring for register allocation:
> https://en.wikipedia.org/w/index.php?title=Register_allocati...
I remark that in particular on architectures that have lots of different register sizes and the capability to reinterprete parts as subregisters (such as x86) graph coloring is only some rough approximate of register allocation; here one has develop more complicated models.
And now I've read your reply I agree. Thanks very much for the additional considerations.
I had no idea the JVM applies analysis to the stack VM state to turn it into register-based code. I realize it's a JIT, but I never really thought through the implications.
Regarding register vs stack - don't stack based systems also have to decide about stack-item size? I'm not sure how this works in practice but surely size considerations get factored in at some point.
Regarding the 2/3-operand instruction problem, this is very interesting but must admit I need to do some reading about graph theory. I do very vaguely understand it but for example https://en.wikipedia.org/wiki/Graph_theory doesn't mention the world "chord" anywhere.
This indeed is a complex problem, and thanks very much for illustrating the difficulty.