Yes, we will update the C Class next month since our private line has a lot of foundry specific code that needs to be removed. The I class needs more work but the design is in place. It will also move to quad issue and would be a Cortex A72/75 class core. More importantly the basic slow IPs, UART, I2C, quad/Octal SPI, SDRAM controller, JTAG, DMA, PLIC will be FPGA and silicon proven and production quality. Will be very useful to other developers (non RISC-V also) as would the AXI bus.