Re:An ARM killer from IIT-M?
by tech2 on Monday November 13, 2017 @07:11AM
(#15685909)
Regarding the big-endian nature of it: kinda, but also kinda not. Network endianness is generally big, so it'd work well in those instance without needing to do any juggling.
Plus (speaking from experience many decades ago on the 68k) reading big-endian memory was so much easier that trying to decipher things in a hex editor on ix86. Though, granted, this is both apocryphal and a minor thing to worry about.
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You'd be surprised how many workloads end up spending large amounts of time in memcmp / strcmp. The chief advantage of big-endianness is that a 64-bit read is already in the order necessary for strcmp or memcmp. This means you don't need specialized instructions for fast strcmp / memcmp. Though, I would guess in a pipelined implementation with good pre-fetch logic, you'll usually not pay any time penalty (and only a single instruction in size penalty) for a byte order swap instruction in the middle of strcmp / memcmp.